Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4"dia x 0.5 mm t, P type, 1SP R:1-10 ohm.cm Max. current +3 A 25O12 (LLZTO)

25O12 (LLZTO)

Includes easy to use and powerful software that allows you to graphically design your battery analysis routines and can simultaneously control over 100 UBA5s from one PC

Please clean the mould via ethanol after the completion of each experiment

Outside (L × W × H): 530 mm × 510mm × 660mm

Such a great feature is available upon request at an extra cost  ( add $195 )

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4"dia x 0.5 mm t, P type, 1SP R:1-10 ohm.cm Max. current +3 A 25O12 (LLZTO)Thermal oxide Research Grade , about 80 % useful area SiO2 layer on 4" Silicon wafer Oxide layer thickness: 300 nm ( 3000A) + 10% Refractive index 1. 455 Silicon Wafer Specifications: Conductive type: P type B doped Resistivity: 1 10 ohm. cm (If you would like to measure the resistivity accurately, please order our Portable 4 Probe Resistivity Testing Instrument.) Size: 4" dia + 0. 5 mm x 0. 525 mm th Orientation: (100) + 0. 5o Polish: one side